Zbr by jwnrt · Pull Request #324 · lowRISC/qemu

jwnrt · 2026-03-02T15:57:45Z

No description provided.

luismarques · 2026-03-02T15:59:42Z

disas/riscv.c

 #include "disas/riscv-xthead.h"
 #include "disas/riscv-xventana.h"

+/* Extensions that are not yet upstream */


Zbr won't get ratified, so maybe tweak this

luismarques · 2026-03-02T16:00:03Z

disas/riscv.c

        { has_xtheadsync_p, xthead_opcode_data, decode_xtheadsync },
        { has_XVentanaCondOps_p, ventana_opcode_data, decode_xventanacondops },
+
+        /* Instructions that are not yet upstream */


AlexJones0 · 2026-03-02T16:20:18Z

util/crc32.c

If I'm being really nitpicky I might want you to also list the polynomial used etc. here like the CRC32C table already has, but I think it's probably fine.

AlexJones0 · 2026-03-02T16:28:57Z

util/crc32.c

We can try submitting this, but IMO, I suspect that what we might want to do instead is actually use the crc32 function from zlib. There is a lot of checked in code that just dispatches to zlib - many devices, but also for example the ARM instruction implementations (see here, here and here).

I tried this but it wasn’t super easy, the RISC-V CRC32 instructions are slightly different in that you’re expected to XOR your accumulator into the LSBs of the data before running the instruction, while the crc functions from zlib integrate this into the instruction itself

AlexJones0 · 2026-03-02T16:36:23Z

disas/riscv-zbr.h

+
+void decode_zbr(rv_decode *, rv_isa);
+
+#endif /* DISAS_RISCV_ZBR_H */


Nit: Maybe this should be named like e.g. DISAS_RISCV_ZBR_0_93_H etc. (same for the file) to make it clearly distinguished from potential future upstream support for RISC-V bitmanip 1.0?

AlexJones0 · 2026-03-02T16:37:52Z

target/riscv/insn_trans/trans_rvb.c.inc

    }                                            \
 } while (0)

+#define REQUIRE_ZBR(ctx) do {                    \


Same again, maybe it should be "ZBR_0_93" to make it clear which version we actually support? But it might be ok since Zbr isn't in 1.0. If not. there should probably be sufficient comments in this file to make it clear the version of Zbr we actually implement.

AlexJones0 · 2026-03-02T16:42:23Z

target/riscv/cpu.c

    DEFINE_RISCV_CPU(TYPE_RISCV_CPU_IBEX, TYPE_RISCV_VENDOR_CPU,
        .misa_mxl_max = MXL_RV32,
-        .misa_ext = RVI | RVM | RVC | RVU,
+        .misa_ext = RVI | RVM | RVC | RVU | RVX,


Nit: IMO adding RVX to the MISA ext should be its own commit preceding this one, but go with your preference here.

Hmm yes, I've separated it but I'm not sure whether it's needed for Zbr and might not submit it

I don't think it's needed for Zbr. Presence of any non-standard extension should result in X being set in MISA but it was not implemented in QEMU until we added it for compatibility with Ibex.

AlexJones0 · 2026-03-02T16:45:30Z

target/riscv/cpu.c

        .cfg.ext_zbc = true,
-        .cfg.ext_zbs = true
+        .cfg.ext_zbs = true,
+        .cfg.ext_zbr = true


I suspect this was originally added here in expectation for Zbr 1.0 ratification. For Zbr 0.93, does it make more sense to instead exist only as a BOOL_FIELD(ext_zbr) in riscv/cpu_cfg_fields.h.inc?

Again I think this is another place where the distinction between Zbr 1.0 and 0.93 should be clearer.

AlexJones0 · 2026-03-02T16:53:43Z

disas/riscv.c

        { has_XVentanaCondOps_p, ventana_opcode_data, decode_xventanacondops },
+
+        /* Instructions that are not yet upstream */
+        { has_zbr_p, rv_zbr_opcode_data, decode_zbr },


Nit: maybe it is not a problem, and probably we should wait to see what upstream says, but the Zbr opcodes may conflict with official encodings in the future. We might want a mechanism for only adding instruction decodings of optional extensions if enabled.

AlexJones0 · 2026-03-02T16:55:48Z

target/riscv/insn_trans/trans_rvb.c.inc

    }                                            \
 } while (0)

+#define REQUIRE_ZBR(ctx) do {                    \


Nit: if we are going to place zbr under trans_rvb.c.inc (I'm not sure this is the right place, it feels like it should have its own file as an experimental unratified spec), then we should at least update the header comment to explain as such. Otherwise its confusing to figure out where this "Zbr" that is not in the ratified spec comes from.

If EGL is used, we can rely on dmabuf to import textures without doing copies. To get this working on X11, we use the existing SDL hint: SDL_HINT_VIDEO_X11_FORCE_EGL (because dmabuf can't be used with GLX). Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Yiwei Zhang <zzyiwei@gmail.com> Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Message-ID: <20260303151422.977399-7-dmitry.osipenko@collabora.com> [AJB: ifdef CONFIG_OPENGL/CONFIG_GBM for non-linux hosts] Message-ID: <20260304165043.1437519-9-alex.bennee@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

QEMU's display GL core is tied to main-loop thread and virtio-gpu interacts with display while processing GPU commands. Virtio-gpu BHs work in generic AIO context that can be invoked on vCPU thread, while GL and UI toolkits are bound to the main-loop thread. Make virtio-gpu BHs use iohandler AIO context that is handled in a main-loop thread only. 0 SDL_GL_MakeCurrent() (libSDL3) 1 SDL_GL_MakeCurrent_REAL() (libSDL2) 2 sdl2_gl_make_context_current() (ui/sdl2-gl.c:201) 3 make_current() (virglrenderer.c:639) 4 vrend_finish_context_switch() (vrend_renderer.c:11630) 5 vrend_hw_switch_context() (vrend_renderer.c:11613) 6 vrend_renderer_force_ctx_0() (vrend_renderer.c:12986) 7 virgl_renderer_force_ctx_0() (virglrenderer.c:460) 8 virtio_gpu_virgl_process_cmd() (virtio-gpu-virgl.c:1013) 9 virtio_gpu_process_cmdq() (virtio-gpu.c:1050) 10 virtio_gpu_gl_handle_ctrl() (virtio-gpu-gl.c:86) 11 aio_bh_poll() (util/async.c) 12 aio_poll() (util/aio-posix.c) 13 blk_pwrite() (block/block-gen.c:1985) 14 pflash_update() (pflash_cfi01.c:396) 15 pflash_write() (pflash_cfi01.c:541) 16 memory_region_dispatch_write() (system/memory.c:1554) 17 flatview_write() (system/physmem.c:3333) 18 address_space_write() (system/physmem.c:3453) 19 kvm_cpu_exec() (accel/kvm/kall-all.c:3248) 20 kvm_vcpu_thread_fn() (accel/kvm/kaccel-ops.c:53) Cc: qemu-stable@nongnu.org Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Message-ID: <20260303151422.977399-8-dmitry.osipenko@collabora.com> Message-ID: <20260304165043.1437519-10-alex.bennee@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Print out error messages when virgl fence creation fails to aid debugging of the fence-related bugs. Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Tested-by: Alex Bennée <alex.bennee@linaro.org> Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Yiwei Zhang <zzyiwei@gmail.com> Tested-by: Yiwei Zhang <zzyiwei@gmail.com> Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Message-ID: <20260303151422.977399-9-dmitry.osipenko@collabora.com> Message-ID: <20260304165043.1437519-11-alex.bennee@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Support asynchronous fencing feature of virglrenderer. It allows Qemu to handle fence as soon as it's signalled instead of periodically polling the fence status. This feature is required for enabling DRM context support in Qemu because legacy fencing mode isn't supported for DRM contexts in virglrenderer. Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Yiwei Zhang <zzyiwei@gmail.com> Tested-by: Yiwei Zhang <zzyiwei@gmail.com> Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Message-ID: <20260303151422.977399-10-dmitry.osipenko@collabora.com> Message-ID: <20260304165043.1437519-12-alex.bennee@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Add support for DRM native contexts to VirtIO-GPU. DRM context is enabled using a new virtio-gpu-gl device option "drm_native_context=on". Unlike Virgl and Venus contexts that operate on application API level, DRM native contexts work on a kernel UAPI level. This lower level results in a lightweight context implementations that yield better performance. Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Tested-by: Alex Bennée <alex.bennee@linaro.org> Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Yiwei Zhang <zzyiwei@gmail.com> Tested-by: Yiwei Zhang <zzyiwei@gmail.com> Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Message-ID: <20260303151422.977399-11-dmitry.osipenko@collabora.com> Message-ID: <20260304165043.1437519-13-alex.bennee@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Extend virtio-gpu documentation with a link to the Mesa VirGL documentation. Suggested-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Yiwei Zhang <zzyiwei@gmail.com> Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Message-ID: <20260303151422.977399-12-dmitry.osipenko@collabora.com> Message-ID: <20260304165043.1437519-14-alex.bennee@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Change virtio-gpu Venus link, pointing it at the Mesa Venus documentation instead of the protocol. The Mesa doc provides more information and also has a link to the protocol. Suggested-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Yiwei Zhang <zzyiwei@gmail.com> Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Message-ID: <20260303151422.977399-13-dmitry.osipenko@collabora.com> Message-ID: <20260304165043.1437519-15-alex.bennee@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

This attempts to tidy up the VirtIO GPU documentation to make the list of requirements clearer. There are still a lot of moving parts and the distros have some catching up to do before this is all handled automatically. Cc: Sergio Lopez Pascual <slp@redhat.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Yiwei Zhang <zzyiwei@gmail.com> Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> [dmitry.osipenko@collabora.com: Extended and corrected doc] Message-ID: <20260303151422.977399-14-dmitry.osipenko@collabora.com> Message-ID: <20260304165043.1437519-16-alex.bennee@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

There is no need to explicitly enable/disable memory region when it's added or deleted respectively. Remove superfluous set_enabled() calls for consistency. Suggested-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp> Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Message-ID: <20260303151422.977399-15-dmitry.osipenko@collabora.com> Message-ID: <20260304165043.1437519-17-alex.bennee@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Check hostmem mapping boundaries originated from guest. Suggested-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Message-ID: <20260303151422.977399-16-dmitry.osipenko@collabora.com> Message-ID: <20260304165043.1437519-18-alex.bennee@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Allow virtio_gpu_virgl_unmap_resource_blob() to be invoked while async unmapping is in progress. Do it in preparation to improvement of virtio-gpu resetting that will require this change. Suggested-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Message-ID: <20260303151422.977399-17-dmitry.osipenko@collabora.com> Message-ID: <20260304165043.1437519-19-alex.bennee@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Properly destroy virgl resources on virtio-gpu reset to not leak resources on a hot reboot of a VM. Suggested-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Message-ID: <20260303151422.977399-18-dmitry.osipenko@collabora.com> Message-ID: <20260304165043.1437519-20-alex.bennee@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Support mapping virgl blobs to a fixed location of a hostmem memory region using new virglrenderer MAP_FIXED API. This new feature closes multiple problems for virtio-gpu on QEMU: - Having dedicated memory region for each mapped blob works notoriously slow due to QEMU's memory region software design built around RCU that isn't optimized for frequent removal of the regions - KVM isn't optimized for a frequent slot changes too - QEMU/KVM has a limit for a total number of created memory regions, crashing QEMU when limit is reached This patch makes virtio-gpu-gl to pre-create a single anonymous memory region covering whole hostmem area to which blobs will be mapped using the MAP_FIXED API. Not all virgl resources will support mapping at a fixed memory address. For them, we will continue to create individual nested memory sub-regions. In particular, vrend resources may not have MAP_FIXED capability. Venus and DRM native contexts will largely benefit from the MAP_FIXED feature in terms of performance and stability improvement. Tested-by: Yiwei Zhang <zzyiwei@gmail.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Message-ID: <20260303151422.977399-19-dmitry.osipenko@collabora.com> Message-ID: <20260304165043.1437519-21-alex.bennee@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Block layer patches - Wire up 'flat' mode also for 'query-block' - Never drop BLOCK_IO_ERROR with action=stop for rate limiting - qcow2: Add keep_data_file command-line option - vmdk: fix OOB read in vmdk_read_extent() - curl: fix concurrent completion handling - nfs: Fix deadlock - mirror: Fix missed dirty bitmap writes during startup - throttle-groups: fix deadlock with iolimits and muliple iothreads # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCgAvFiEE3D3rFZqa+V09dFb+fwmycsiPL9YFAmmrHbgRHGt3b2xmQHJl # ZGhhdC5jb20ACgkQfwmycsiPL9b+ng/+P4B3q+Rrvb5WWrY8fro/3kzSqGAHjKeL # QqEU8zywck5EorzK0H2f8BskxqXJ/LAe7ut4rFGqCA85l/eyWT7OhGm/DHnO/oI8 # /nU5r800/ZpvKn9HqK5+TSkswYQ6RmmMF9ZYIfYdB/JqPAmVmvbcjdqASVRT4PZ+ # v9QUKY309LDoaWm+vO/f0oPyxhog6yDHVh/rGhDkCOMyNExFyvfvAeLVuu+99Nzz # GFxleM7JyHdVmIErbKRNp2Z/uVSQvlOg5uecI3IZnc2QUbACQWWc97PCP199JzZ+ # HaEq8tP+/TQZSsXEYKHmxYx4AyzCIu15qDmpnfhnoA9MC80P+eLrHJ5sXOsT6S32 # AyTLIE6KKLImtLyG6TZV05G127c7ekrMbY8OfY21ocACUstr4q6MY1J6ZCcLQRMZ # E0BZR0CEOYtImrx0wr1XR0/q7SceiIaDcwFuPkHKz2akRS7bq9KH1RfxHYPpBJiX # nkkLtilV4s/OlhrsoGJeq44C7jZA2MdrgouxNiPe+08CFeJra5wQybC7ZIYqknx6 # D/Eu4Y6KwMbyfnMd/4F0kbzHv9h8R+ri2hHUqfKEtl2pNTqe8JEpsPmn+yMpuRe4 # Cl66DFs0OzcONiUBNJVdGg0dm0jtIyCEo2am1MAJUgGkwYKxtgUQLsouSJS1d4EP # iDe9pZmlytg= # =kPKk # -----END PGP SIGNATURE----- # gpg: Signature made Fri Mar 6 18:32:24 2026 GMT # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: issuer "kwolf@redhat.com" # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * tag 'for-upstream' of https://gitlab.com/kmwolf/qemu: iotests/244: Add test cases for keep_data_file iotests/common.filter: Sort keep_data_file qcow2: Simplify size round-up in co_create_opts qcow2: Add keep_data_file command-line option block/nfs: Do not enter coroutine from CB block: Never drop BLOCK_IO_ERROR with action=stop for rate limiting block/throttle-groups: fix deadlock with iolimits and muliple iothreads mirror: Fix missed dirty bitmap writes during startup block/curl: fix concurrent completion handling hmp_nbd_server_start: Don't ask for backing image data block: Wire up 'flat' mode also for 'query-block' block/vmdk: fix OOB read in vmdk_read_extent() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

…om/stsquad/qemu into staging virtio-gpu updates (resolution, error handling, fences, native context) - support per-head resolution definitions - don't disable scanouts on sdl and gtk when display refreshed - take care not confuse virgl with switching contexts - use dmabuf to import textures when we can - keep virtio BH processing to main-loop - improve error handling for fence creation - support async fences - add support for DRM native context - update virtio-gpu docs - remove superfluous memory region enabling - validate mapping offsets - destroy vrigl resources on reset - support mapping hostmem blobs with map_fixed # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmmrEysACgkQ+9DbCVqe # KkQhugf/eab7ZSMfQzOArOjKcr+SSXiFE3wXg9HKRrbZx/yHRAiQ/Fv9Qx7uH8Q5 # Q7/A1l9WN/iwv2/jHWJv7gSOrYaRYIL0vXn/oriVNncZx779o56YhTIEYcSZ+zaF # lHwLHpnzi2jcrmlhV49Mp1+tUH9U3OXwWzAUKTjhJxnLomoBwwcBaftbbBUj2cmS # a3t1SMeIEq1hX7fCDnkBUfkUGAmPbk/vp/oXxF5SmBJIiyKB+O9jbx408hMQsNFo # vulBmD2a5EOPwvBC0K6v+9aAbUicOFHwoQyeFvM8HTObMPj6+F40fvq+STNre22X # Ln9a+tB/nq+7auX1D9VZSCkH7vzGRw== # =x8lu # -----END PGP SIGNATURE----- # gpg: Signature made Fri Mar 6 17:47:23 2026 GMT # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * tag 'pull-11.0-virtio-gpu-updates-060326-1' of https://gitlab.com/stsquad/qemu: virtio-gpu: Support mapping hostmem blobs with map_fixed virtio-gpu: Destroy virgl resources on virtio-gpu reset virtio-gpu: Replace finish_unmapping with mapping_state virtio-gpu: Validate hostmem mapping offset virtio-gpu: Remove superfluous memory_region_set_enabled() docs/system: virtio-gpu: Document host/guest requirements docs/system: virtio-gpu: Update Venus link docs/system: virtio-gpu: Add link to Mesa VirGL doc virtio-gpu: Support DRM native context virtio-gpu: Support asynchronous fencing virtio-gpu: Handle virgl fence creation errors virtio-gpu: Ensure BHs are invoked only from main-loop thread ui/sdl2: Implement dpy dmabuf functions ui/sdl2: Restore original context after new context creation ui/gdk: Restore original context after new context creation ui/egl: Don't change bound GL context when creating new context ui/sdl2: Don't disable scanout when display is refreshed ui/gtk: Don't disable scanout when display is refreshed virtio-gpu: Fix scanout dmabuf cleanup during resource destruction Support per-head resolutions with virtio-gpu Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

When using llvm-addr2line in replacement of addr2line, it will output zero sized symbols, which can shadow other binaries depending on where their location is (happens with arm-trusted-firmware and its different binaries). Thus, ignore those symbols. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Link: https://lore.kernel.org/qemu-devel/20260306051553.2778652-1-pierrick.bouvier@linaro.org Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>

The file pointer can be NULL when e.g., opening the file failed. vcpu_interval_exec() already implements a NULL-pointer check, but plugin_exit() misses it. Handle the condition by adding the missing check to plugin_exit(). Fixes: 0d279be ("contrib/plugins: Add a plugin to generate basic block vectors") Signed-off-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Link: https://lore.kernel.org/qemu-devel/20260307-bbv-v1-1-d5757d1deac8@rsg.ci.i.u-tokyo.ac.jp Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>

These machines has been supported for a period of more than 6 years. According to our versioned machine support policy (see commit ce80c4f "docs: document special exception for machine type deprecation & removal") they can now be removed. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20260307150042.78030-2-philmd@linaro.org>

The pc_compat_3_0[] array was only used by the pc-q35-3.0 and pc-i440fx-3.0 machines, which got removed. Remove it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20260307150042.78030-3-philmd@linaro.org>

The X86CPU::hyperv_synic_kvm_only boolean (see commit 9b4cf10 "hyperv: only add SynIC in compatible configurations") was only set in the pc_compat_3_0[] array, via the 'x-hv-synic-kvm-only=on' property. We removed all machines using that array, lets remove that property and all the code around it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20260307150042.78030-4-philmd@linaro.org>

The hw_compat_3_0[] array was only used by the pc-q35-3.0 and pc-i440fx-3.0 machines, which got removed. Remove it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20260307150042.78030-5-philmd@linaro.org>

Stubs are provided by libqemuutil. We want to use the generic meson machinery to provide stubs once, instead of per sub-directories. Move the 'subdir' calls earlier so when these directories are processed they can add units to the global stub_ss[] source set. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260225035739.42848-2-philmd@linaro.org>

acpi_interface.c should only register QOM interfaces. Move the acpi_send_event() function to core.c with the other event handlers, and its declaration in 'hw/acpi/acpi.h'. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20260225035739.42848-3-philmd@linaro.org>

acpi_interface.c should only register QOM interfaces. Move the qbus_build_aml() function to aml-build.c with the other AML build-related helpers. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20260225035739.42848-4-philmd@linaro.org>

Now that acpi_interface.c only contains QOM interfaces, unconditionally link it with system binaries, regardless of whether CONFIG_ACPI is set or not. It is now easier to deselect hardware models depending on ACPI. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20260225035739.42848-5-philmd@linaro.org>

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20260225035739.42848-6-philmd@linaro.org>

The expansions that we chose in tcg-op.c may be less than optimal. Delay lowering until optimize, so that we have propagated constants and have computed known zero/one masks. Reviewed-by: Jim MacArthur <jim.macarthur@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20260303010833.1115741-3-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

The expansions that we chose in tcg-op.c may be less than optimal. Delay lowering until optimize, so that we have propagated constants and have computed known zero/one masks. Reviewed-by: Jim MacArthur <jim.macarthur@linaro.org> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20260303010833.1115741-4-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Use extract2 to implement rotri. To make this easier, redefine rotli in terms of rotri, rather than the reverse. Reviewed-by: Jim MacArthur <jim.macarthur@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20260303010833.1115741-5-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Create a function to test whether the second operand of a binary operation allows a given immediate. Reviewed-by: Jim MacArthur <jim.macarthur@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> [rth: Split out from a larger patch; keep the declaration internal.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20260303010833.1115741-6-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Instead of assuming only small immediates are available for AND, consult the backend in order to decide between SHL/SHR and SHR/AND. Reviewed-by: Jim MacArthur <jim.macarthur@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> [rth: Split from a larger patch] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20260303010833.1115741-7-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Use tcg_op_imm_match to choose between expanding with AND+SHL vs SHL+SHR. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20260303010833.1115741-8-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

The HPPA target is a 64-bit one, so tcg_global_mem_new() expands to tcg_global_mem_new_i64(). Use the latter which is more explicit. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260205212914.10382-1-philmd@linaro.org>

kvm-accel-ops.c uses EXCP_DEBUG, itself defined in "exec/cpu-common.h". Include it explicitly, otherwise we get when modifying unrelated headers: ../accel/kvm/kvm-accel-ops.c: In function ‘kvm_vcpu_thread_fn’: ../accel/kvm/kvm-accel-ops.c:54:22: error: ‘EXCP_DEBUG’ undeclared (first use in this function) 54 | if (r == EXCP_DEBUG) { | ^~~~~~~~~~ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260225051303.91614-2-philmd@linaro.org>

Commit 3607715 ("kvm: Introduce KVM irqchip change notifier") restricted the kvm_irqchip*notifier() declarations to target-specific files, guarding them under the NEED_CPU_H (later renamed as COMPILING_PER_TARGET) #ifdef check. This however prohibit building the kvm-stub.c file once: ../accel/stubs/kvm-stub.c:70:6: error: no previous prototype for function 'kvm_irqchip_add_change_notifier' [-Werror,-Wmissing-prototypes] 70 | void kvm_irqchip_add_change_notifier(Notifier *n) | ^ ../accel/stubs/kvm-stub.c:74:6: error: no previous prototype for function 'kvm_irqchip_remove_change_notifier' [-Werror,-Wmissing-prototypes] 74 | void kvm_irqchip_remove_change_notifier(Notifier *n) | ^ ../accel/stubs/kvm-stub.c:78:6: error: no previous prototype for function 'kvm_irqchip_change_notify' [-Werror,-Wmissing-prototypes] 78 | void kvm_irqchip_change_notify(void) | ^ Since nothing in these prototype declarations is target specific, move them around to be generically available, allowing to build kvm-stub.c once for all targets in the next commit. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20260309174941.67624-2-philmd@linaro.org>

Move stubs to the global stub_ss[] source set. These files are now built once for all binaries, instead of one time per system binary. Inspired-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260225044225.64059-1-philmd@linaro.org>

Forward-declare the target-specific mshv_root_hvcall structure in order to keep 'system/mshv_int.h' target-agnostic. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260225051303.91614-3-philmd@linaro.org>

Code in accel/ aims to be target-agnostic. Enforce that by moving the MSHV file units to system_ss[], which is target-agnostic. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260225051303.91614-4-philmd@linaro.org>

Code in accel/ aims to be target-agnostic. Enforce that by moving the HVF file units to system_ss[], which is target-agnostic. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260225051303.91614-5-philmd@linaro.org>

Code in accel/ aims to be target-agnostic. Enforce that by moving the Xen file units to system_ss[], which is target-agnostic. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Anthony PERARD <anthony.perard@vates.tech> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260225051303.91614-6-philmd@linaro.org>

No code within qtest.c uses target-specific knowledge: build it once as target-agnostic common unit. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20260225053408.18426-1-philmd@linaro.org>

…to staging Memory pull for 11.0 softfreeze - BALATON's memory cleanups on _nomigrate MRs and else - Phil's small constify series and else - Marc-André's initial cleanup patches around ram discard manager # -----BEGIN PGP SIGNATURE----- # # iIgEABYKADAWIQS5GE3CDMRX2s990ak7X8zN86vXBgUCaa8v2xIccGV0ZXJ4QHJl # ZGhhdC5jb20ACgkQO1/MzfOr1wbiNgD/ZLS5BtRGva5eUQNXKkE3oOiXfDBkLyQ1 # BowQ12zjPZMBAOxrVvyGbpgsI5SOcSjsvFSsWLs1GFfHjVUAyCNusl4D # =+4wZ # -----END PGP SIGNATURE----- # gpg: Signature made Mon Mar 9 20:38:51 2026 GMT # gpg: using EDDSA key B9184DC20CC457DACF7DD1A93B5FCCCDF3ABD706 # gpg: issuer "peterx@redhat.com" # gpg: Good signature from "Peter Xu <xzpeter@gmail.com>" [marginal] # gpg: aka "Peter Xu <peterx@redhat.com>" [marginal] # gpg: WARNING: The key's User ID is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: B918 4DC2 0CC4 57DA CF7D D1A9 3B5F CCCD F3AB D706 * tag 'staging-pull-request' of https://gitlab.com/peterx/qemu: system/memory: Have memory_region_type() correctly describe containers system/xen: Constify various MemoryRegion arguments system/memory: Constify various MemoryRegion arguments system/ramblock: Constify various RAMBlock arguments kvm: replace RamDicardManager by the RamBlockAttribute system/memory: minor doc fix virtio-mem: use warn_report_err_once() memory: drop RamDiscardListener::double_discard_supported system/rba: use DIV_ROUND_UP memory: Factor out common ram ptr initialization memory: Factor out common ram region initialization memory: Add internal memory_region_register_ram function memory: Shorten memory_region_init_ram_device_ptr and memory_region_init_rom_device memory: Remove memory_region_init_ram_nomigrate() hw/xtensa/xtfpga: Do not use memory_region_init_ram_nomigrate() sun4m,sun4u,tcx: Do not use memory_region_init_ram_nomigrate() memory: Remove memory_region_init_rom_nomigrate() hw/display/{cg3.tcx}: Do not use memory_region_init_rom_nomigrate() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

…into staging - Improve the s390-ccw bios to be able to boot from virtio-blk-pci devices - Rework migration functional test to avoid a problem in the ppc64 test - Disable functional memlock test for asan builds - Some other minor tests improvements # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCgAdFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmmvsfEACgkQLtnXdP5w # LbWozA/+NNi0PkYBvpubpAxoT9uRj9UiP+rcgzbWF93NxT5hLQINzwr4VvwbEdN0 # GM1vCUlGOcDhyDN7xcf82IYCLsOB1gU2+V6zEoGzsKdoXi9JIMh/EWowHuDh4HU2 # 1ghrevttQfRc97I4lh/w0s/zXwSu7ckflivo6TNzIxUdpP+NuSSCCGXygB54Ab0P # bCt5lqKFAdn/HF1fIcNgMWEwPbmRtqkOlaxgTYghKdhau7SxZsRqlERlR2gA95bx # u/n4pCMYTRoWYnROp+ChoZzhfmoHTuEb13GVOivbxsfXptoFeUCJlIQN2BNMK54E # 6IxPzZ8F9d0KYlIc7sxEr9f3BvdBmbmbD4BV3bB6r0754EVQ2sJ5fXJOd4vE255O # KJrnUWgHS3ipJrxn0CjkuVT8yN0T78oXR6pQUWCjMduMpAqXEqlAh1YEIfVWpnXv # UXg/vte3MdnObowpVQwezBBtldqs2tP/Cu1gqL1AAJm1OJVfSjDnyR70w63ACqRh # 2hogG5wKKmGBIzLnehUu0wB9nbhXzLzYljfNJnAu/I031eTjeqU0JLWbOK1XELZY # Jv4HsNZz+bztN/XszfHo6U9WArUYslc8CYlywV+qQX7WZuNuxxHRlBlEME3lr6qL # by8q5h0qQOygkYJ32oKDR1v60X10UlnudSI9Wlnsq6y24F3Koo0= # =tk60 # -----END PGP SIGNATURE----- # gpg: Signature made Tue Mar 10 05:53:53 2026 GMT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [undefined] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2026-03-10' of https://gitlab.com/thuth/qemu: (25 commits) pc-bios/s390-ccw.img: Update the s390 bios blog with the latest changes pc-bios/s390-ccw: Fix compiler warning when compiling with DEBUG enabled tests/qtest: Add s390x PCI boot test to cdrom-test.c hw: Add "loadparm" property to virtio block PCI devices booting on s390x s390x: Build IPLB for virtio-pci devices pc-bios/s390-ccw: Add support for virtio-blk-pci IPL pc-bios/s390-ccw: Introduce virtio-pci functions pc-bios/s390-ccw: Introduce PCI device s390x: Add definitions for PCI IPL type pc-bios/s390-ccw: Introduce CLP Architecture include/hw/s390x: Move CLP definitions for easier BIOS access pc-bios/s390-ccw: Split virtio-ccw and generic virtio pc-bios/s390-ccw: Store device type independent of sense data s390x: Remove duplicate definitions of IPL types pc-bios/s390-ccw: Always reset virtio device on failed boot attempt pc-bios/s390-ccw: Remove redundant vring schid attribute pc-bios/s390-ccw: Fix misattributed function prototypes tests/functional/ppc64/pseries: Remove custom migration routine tests/functional/migration: Use the migrate_vms helper tests/functional/migration: Add migrate_vms ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

The LDPTE helper loads a page table entry (or huge page entry) from guest memory and currently applies the PALEN mask to the whole 64-bit value. That mask is intended to constrain the physical address bits, but masking the full entry also clears upper permission bits in the PTE, including NX (bit 62). As a result, LoongArch TCG can incorrectly allow instruction fetches from NX mappings when translation is driven through software page-walk. Fix this by masking only the PPN/address field with PALEN while preserving permission bits, and by clearing any non-architectural (software) bits using a hardware PTE mask. LDDIR is unchanged since it returns the base address of the next page table level. Reported at: https://gitlab.com/qemu-project/qemu/-/issues/3319 Fixes: 56599a7 ("target/loongarch: Introduce loongarch_palen_mask()") Cc: qemu-stable@nongnu.org Signed-off-by: rail5 (Andrew S. Rightenburg) <andrew@rail5.org> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>

loongarch_cpu_do_interrupt() updates CSR_BADI by fetching the faulting instruction with cpu_ldl_code_mmu(). For a PNX exception (instruction fetch prohibited by NX), fetching the instruction at env->pc will fault with PNX again. This can lead to an infinite exception loop. Treat PNX like other instruction-fetch exceptions (PIF/ADEF) and do not update CSR_BADI for it. Fixes: 410dfbf ("target/loongarch: Move TCG specified functions to tcg_cpu.c") Cc: qemu-stable@nongnu.org Signed-off-by: rail5 (Andrew S. Rightenburg) <andrew@rail5.org> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>

The guest policy is set either through command-line or through IGVM. If none of the above applies, default guest policy applies. However, if IGVM does not set the guest policy, currently the policy gets set to 0 regardless of whether it was previously set to default value or command line. This change fixes this by checking if IGVM indeed has set a policy value. If not, do not reset existing value. This avoids guest crashes such as the following during reset when the IGVM has not explicitly set any guest policies: qemu-system-x86_64: sev_snp_launch_start: SNP_LAUNCH_START ret=-22 fw_error=0 '' qemu-system-x86_64: sev_common_kvm_init: failed to create encryption context qemu-system-x86_64: unable to rebuild guest: Operation not permitted(-1) Reported-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Ani Sinha <anisinha@redhat.com> Message-ID: <20260310094450.35861-3-anisinha@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>

… staging Accelerators and TCG patches queue - Improve TCG extract and deposit - Build accelerator stub files once # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmmv9goACgkQ4+MsLN6t # wN4NVQ//UsLGikzMHhQ52JqSePy3hJ00uBzeZ+6exKcgWfCHCEKLimTewCSuhdjM # qic6DGSShUrl36EVT1qRdz261jntgvfn12TQfs0LdSvgZKBjdWFcZ+AiIp54jYTS # Wi0Qsdqi0+oXg4ictiefmGlgqo65qJU8U8mnclzOa5GmLMZC4QbGhV3qvEcE0BNc # 1tzLSSschLWOqAG+vaHUCyyhr28UgJGO7pqVSuVnw2fA1jXVyRH671ZIyhBf85o9 # eWlChqtuvwrauKojD2eIK4qMw3esDqlwRXckvLu6/Nq1McXYbdc5Mm61c6JW5Wza # LXMms6bix2iS0CoR5qmkEFgttVe5aZtJwXkYW2FE/+p6wscZHOyhrs0YdxkYqjgp # 9WYkyqK9oeLLDBHQ2XAa4f+zE/4nPaWzKElu/kqA+XrrxvnkQisD2uijxioXCi6X # CUa+pJrXxiKZOrWRXRGwuPpdJT4CrX082ydhQnsnH0Pi7gedpXZj9eYIRjxSvndZ # 06ONtE/4Ja++gKNF6sbu8HLY7eCrfIVCQGOex4h6BrQsyZKU/EYbw0LhcVfUooMw # QsF3rMD2AyWpzPzcJ3Y0E7t7e5iKNJoKLlN3ziR9qz34HCjdoNmbIwvbR5oUkJpd # dhvtPikIIgcRnQvVmuLdkiTg6he9z70lsCtSBCkkLQN8nb8j9cE= # =ak2F # -----END PGP SIGNATURE----- # gpg: Signature made Tue Mar 10 10:44:26 2026 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'accel-tcg-20260310' of https://github.com/philmd/qemu: accel/qtest: Build once as common object accel/xen: Build without target-specific knowledge accel/hvf: Build without target-specific knowledge accel/mshv: Build without target-specific knowledge accel/mshv: Forward-declare mshv_root_hvcall structure accel/stubs: Build stubs once accel/kvm: Make kvm_irqchip*notifier() declaration non target-specific accel/kvm: Include missing 'exec/cpu-common.h' header target/hppa: Expand tcg_global_mem_new() -> tcg_global_mem_new_i64() tcg/optimize: possibly expand deposit into zero with shifts tcg: target-dependent lowering of extract to shr/and tcg: Add tcg_op_imm_match tcg: Expand missing rotri with extract2 tcg/optimize: Lower unsupported extract2 during optimize tcg/optimize: Lower unsupported deposit during optimize tcg: Drop extract+shl expansions in tcg_gen_deposit_z_* Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

…qemu into staging loongarch bug fix # -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQTKRzxE1qCcGJoZP81FK5aFKyaCFgUCabAI8QAKCRBFK5aFKyaC # FpRjA/sEr6qXd39gBPudz/qUJQ5b+4yJIk7KUknw0vR/Dxo97XwNBRoBYkKPQED5 # mcPJkjBrZdNQnWQmWZPK4LSMzfW7juhW+OeG59fX/hD5JgzXVM9MgRLG89VwiZbc # 1oTEI0paFaCjImzamHuGxIxVQ5/niyo3X5/dLluKDdYX9uk1+g== # =d2Zg # -----END PGP SIGNATURE----- # gpg: Signature made Tue Mar 10 12:05:05 2026 GMT # gpg: using RSA key CA473C44D6A09C189A193FCD452B96852B268216 # gpg: Good signature from "Song Gao <gaosong@loongson.cn>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: CA47 3C44 D6A0 9C18 9A19 3FCD 452B 9685 2B26 8216 * tag 'pull-loongarch-20260310' of https://github.com/gaosong715/qemu: target/loongarch: Avoid recursive PNX exception on CSR_BADI fetch target/loongarch: Preserve PTE permission bits in LDPTE Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

…el/qemu into staging - firmware.json spec update for svsm. - igvm bugfixes. # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCgAdFiEEoDKM/7k6F6eZAf59TLbY7tPocTgFAmmwGuAACgkQTLbY7tPo # cTiOBQ//cln4/XTERNZqSiKGcjeX857L0KSw1JN2hHgXwvTMBTdCJHz0ZQw8mk5t # ixcguZjmF2F9Xblljjwf8mQATtbZfnVtkkDXIGeezO3DRP38KK7OcHHPtHIJ2bdc # cR1WOAPVn3465AFa6RqOhjK17U2aU9NQG7ecW2LbB6MuPCTwMdDQeZ4UEsVuBFf6 # b7vIUmDAQmOhMQEnaVdQUUFY7NyTv8i7KCXdf7c7Iz32VC7XJHJwQKrK7ixtuzVP # /YWlcg//Qld/fhAWSb6N/mPxbrlpVbzeP93uoS0NF8RnF+5UpbNmNs2GSnI0Hu2+ # P1nvxOBDUGY6jZoha9mOQqMwj9C/rIC9mn72Wj0s8rukQV+bMZX/HjSF4HN1gbeV # 2vqT3+I7khQxg89tlsGPCMMM+AtLCZA5dMKZ2EnAUdmZMbGEfjoR31spfIbUMsiI # edDWLTetPHMHy+0Cyqbsg40RRmV9/QuysmFbMV5St2J+6oXxZBdF23m3VtDrYZRY # e8qliIH8fdtnQWScELuAU33SY300ZXolurwHKsE86eWWDk2x6+u3funLWV3wcp3g # ME0x3CycRooCEYV3ixy335YYMcE1pH6XjFLjMU6S5ABY3d/34P+0sF44ztvQ5Apj # R+mEYe1gwyRzyTOUzBRz9+xJJvzOjpPTXvukKKofcF8eZNO+pTA= # =taqn # -----END PGP SIGNATURE----- # gpg: Signature made Tue Mar 10 13:21:36 2026 GMT # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * tag 'firmware-20260310-pull-request' of https://gitlab.com/kraxel/qemu: i386/sev/igvm: do not reset guest policy if IGVM does not set it igvm: fix build when igvm is not installed in a well known path docs/interop: Add AMD SEV-SNP SVSM interface to firmware.json Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

These are needed for the RISC-V Zbr0p93 CRC32 instructions which pre-XOR the data into the CRC state before the instruction is executed, making the zlib crc32 and QEMU crc32c implementations inappropriate. https://github.com/riscv/riscv-bitmanip/releases/download/v0.93/bitmanip-0.93.pdf Signed-off-by: James Wainwright <james.wainwright@lowrisc.org>

This extension was not ratified with the Zb[abcs] bitmanip extensions. This is the latest draft version (0.93) as implemented by the Ibex core. These instructions are in the reserved encoding space but have not been ratified and could conflict with future ratified instructions. For this reason they are added as a vendor extension to support Ibex's impl. Signed-off-by: James Wainwright <james.wainwright@lowrisc.org>

Placed in a separate file as an unratified extension. Signed-off-by: James Wainwright <james.wainwright@lowrisc.org>

luismarques reviewed Mar 2, 2026

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AlexJones0 reviewed Mar 2, 2026

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jwnrt force-pushed the zbr branch 2 times, most recently from c5a659c to 2acb095 Compare March 4, 2026 09:42

peppsac and others added 26 commits March 6, 2026 17:27

rth7680 and others added 15 commits March 10, 2026 11:36

jwnrt force-pushed the zbr branch from fdcd59b to e23482d Compare March 10, 2026 10:42

pm215 and others added 11 commits March 10, 2026 11:38

disas: diassemble RISC-V Zbr0p93 instructions

29547bb

Placed in a separate file as an unratified extension. Signed-off-by: James Wainwright <james.wainwright@lowrisc.org>

jwnrt force-pushed the zbr branch from e23482d to 29547bb Compare March 10, 2026 15:04

jwnrt closed this Mar 10, 2026

jwnrt reopened this Mar 10, 2026


		void decode_zbr(rv_decode *, rv_isa);

		#endif /* DISAS_RISCV_ZBR_H */

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AlexJones0 Mar 2, 2026 •

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