A synthesizable 16-bit ALU implemented in Verilog, featuring Power-Aware Design through Clock Gating and Dynamic Frequency Scaling (DFS).
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Mar 21, 2026 - Verilog
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digitalcircuits
Here are 4 public repositories matching this topic...
A Python tool for Binary ↔ Gray Code conversion using bitwise XOR. Helps reduce errors in digital systems, encoders, and communication protocols. Efficient, lightweight, and well-documented for easy use in projects.
errorcorrection binarytograyscale graycodeconverter digitalcircuits bitwiseoperations binaryconversion pythonbitwise codind-moves
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Mar 10, 2025 - Python
Verilog code for combinational and sequential circuits
verilog bcd mux hdl multiplexer verilog-hdl moore-machine adders mealy-machine-code flipflop latches synchronous-counter sequentialcircuits shift-registers 7segmentdisplay digitalcircuits flipflop-codes subtractors
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Dec 2, 2025 - Verilog
A dedicated Verilog HDL practice space focused on designing, simulating, and documenting digital logic circuits using Xilinx Vivado. This repository aims to strengthen HDL fundamentals through clean code, structured testbenches, and visual outputs like schematics and timing diagrams.
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Mar 11, 2026 - Verilog
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